UTTORI ASM · IN DEVELOPMENT

65C02 instruction additions

Browse accepted 65c02 instruction additions mnemonics and addressing forms.

On top of NMOS, 65SC02 (66 mnemonics) adds:

Group	Mnemonics / forms
Control	`BRA target`
Implied	`INA`, `DEA`, `PHX`, `PHY`, `PLX`, `PLY`
Memory	`STZ zp\|addr\|zp,x\|addr,x`, `TRB zp\|addr`, `TSB zp\|addr`
Addressing	`(zp)` on ALU/load/store. `BIT` `#value\|zp,x\|addr,x`. `INC`/`DEC` `A`. `JMP (addr,x)`

65C02 (98 mnemonics) adds Rockwell bit ops: RMB0–RMB7 zp, SMB0–SMB7 zp, BBR0–BBR7 zp,target, BBS0–BBS7 zp,target.

W65C02 (100 mnemonics) adds WAI and STP.