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SPC700 instruction catalog

Browse accepted spc700 instruction catalog mnemonics and addressing forms.

The generated catalog contains one machine-readable form for each opcode. The table below remains a compact reading guide. Use the exported spc700Specifications for exact opcode, size, syntax, flow, and effect metadata.

Mnemonic What it does Accepted operand forms
MOV Move data between registers and memory. A,#const, A,dp, A,!addr, dp,A, !addr,A, A,(X), dp,dp, dp,#const
ADC Add with carry. A,#const, A,dp, A,!addr, dp,dp
SBC Subtract with borrow. A,#const, A,dp, A,!addr
CMP Compare. A,#const, A,dp, A,!addr
AND Bitwise AND. A,#const, A,dp
OR Bitwise OR. A,#const, A,dp
EOR Bitwise exclusive-OR. A,#const, A,dp
INC Increment. A, dp
DEC Decrement. A, dp
ASL Arithmetic shift left. A, dp
LSR Logical shift right. A, dp
ROL Rotate left. A, dp
ROR Rotate right. A, dp
BRA, BEQ, BNE, BCS, BCC Branch on the named condition. label
BVS, BVC, BMI, BPL Branch on the named condition. label
CBNE Compare and branch if not equal. dp,label
DBNZ Decrement and branch if not zero. dp,label
JMP Jump. !addr, [!addr+X]
CALL Call subroutine. !addr
RET, RETI, NOP Return or no operation. implied
CLRC, SETC, CLRP, SETP Clear/set carry or direct-page flag. implied
EI, DI, STOP Interrupt/processor control. implied
PUSH, POP Transfer a register to/from the stack. A (other fixture-backed registers are encoder-supported)

Numbered BBS0...BBS7 and BBC0...BBC7 bit branches have distinct opcode rows in the generated catalog.

The complete fixture-backed SPC700 mnemonic set is:

ADC AND EOR OR SBC ASL LSR ROL ROR
BBC0 BBC1 BBC2 BBC3 BBC4 BBC5 BBC6 BBC7
BBS0 BBS1 BBS2 BBS3 BBS4 BBS5 BBS6 BBS7
BPL BRA BMI BVC BVS BCC BCS BNE BEQ
SET0 SET1 SET2 SET3 SET4 SET5 SET6 SET7
CLR0 CLR1 CLR2 CLR3 CLR4 CLR5 CLR6 CLR7
CMP CBNE DBNZ DAA DAS NOT1 XCN MOV1 DECW INCW CMPW ADDW SUBW MOVW MUL DIV
DEC INC MOV OR1 AND1 EOR1 TCALL TSET TCLR CALL PCALL JMP PUSH POP NOP BRK
RET RETI CLRP SETP CLRC SETC EI DI CLRV NOTC SLEEP STOP