UTTORI ASM ยท IN DEVELOPMENT
Super FX instruction catalog
Browse accepted super fx instruction catalog mnemonics and addressing forms.
| Mnemonic group | What it does | Accepted operand forms |
|---|---|---|
STOP, NOP, CACHE, LSR, ROL, LOOP |
Core implied operations | implied |
ALT1, ALT2, ALT3 |
Select alternate opcode family | implied |
PLOT, SWAP, COLOR, NOT, MERGE, SBK |
Pixel/data operations | implied |
SEX, ASR, ROR, LOB, FMULT, HIB |
Arithmetic/byte operations | implied |
GETC, GETB, RPIX, CMODE, DIV2, LMULT |
ROM/pixel/arithmetic operations | implied |
GETBH, RAMB, GETBL, ROMB, GETBS |
ROM/RAM bank and byte operations | implied |
BRA, BGE, BLT, BNE, BEQ, BPL, BMI, BCC, BCS, BVC, BVS |
Relative branches | label |
TO, WITH, FROM |
Select source/destination register | Rn |
ADD, ADC, SUB |
Arithmetic on SReg | Rn, #n |
SBC, CMP |
Arithmetic/compare on SReg | Rn |
AND, BIC, OR, XOR, MULT, UMULT |
Logic and multiply | Rn, #n |
JMP, LJMP |
Jump through register | Rn (R8-R13) |
INC, DEC |
Change register | Rn (R0-R14) |
LINK |
Set R11 to PBR:PC+n |
#n |
STW, LDW, STB, LDB |
Word/byte RAM transfer | (Rn) |
IBT |
Load signed byte | Rn,#imm |
IWT |
Load word | Rn,#imm |
LM, LMS |
Load register from RAM | Rn,(addr), Rn,(xx) |
SM, SMS |
Store register to RAM | (addr),Rn, (xx),Rn |
LEA |
Load effective address | Rn,addr |
MOVE |
Move register, immediate, or RAM value | Rn,Rm, Rn,#imm, Rn,(addr), (addr),Rn |
MOVES |
Move register and update flags | Rn,Rm |
MOVEB, MOVEW |
Byte/word move through register pointer | (Rn),Rm, Rn,(Rm) |
The full 77-mnemonic list is:
STOP NOP CACHE LSR ROL LOOP ALT1 ALT2 ALT3 PLOT SWAP COLOR NOT MERGE SBK SEX
ASR ROR LOB FMULT HIB GETC GETB RPIX CMODE DIV2 LMULT GETBH RAMB GETBL ROMB
GETBS BRA BGE BLT BNE BEQ BPL BMI BCC BCS BVC BVS TO WITH FROM ADD ADC SUB SBC
CMP AND BIC OR XOR MULT UMULT JMP LJMP INC DEC LINK STW LDW STB LDB IBT IWT LM
LMS SM SMS LEA MOVE MOVES MOVEB MOVEW
Captured WRAM/SRAM instruction analysis are described in the SNES analysis guide.